Webex 會議連結
會議號： 2512 792 2137
密碼： aqJpvHJJ386

The reliability of DRAM and NAND flash memory declines as technology scales further. Manufacturers employ redundancy-heavy designs, frequent refresh cycles, and hardware-based ECC to maintain the illusion of fully reliable memory. While financially viable, these approaches ignore the significant carbon footprint of memory production and the operational energy consumption of these devices. In modern SoCs, the tight integration of logic and memory worsens the issue, as heat dissipation from compute units accelerates memory degradation. Memory chips are often prematurely decommissioned, even when much of their capacity remains usable. The retirement of memory often results in the decommissioning of entire SoCs, and their tight integration makes recycling difficult. The relentless pursuit of greater memory capacity and faster computation leads to huge environmental costs.

This talk advocates for rethinking how software interacts with memory. Instead of assuming fully reliable memory, we should embrace its physical instability and variability to ensure sustainability and move beyond the environmentally costly practices of the current memory economy. I will present techniques such as mixed-precision computing, iterative refinement, software-driven error correction, and adaptive data placement based on memory reliability and data lifetime. I will also discuss repurposing and recycling partially degraded memory to extend its lifecycle and deliver value from imperfect chips. By trading off precision for extended memory use, we can reduce the ongoing increase in e-waste and depletion of planet resources in our pursuit of more advanced computing.